| Brand Name: | Hoan |
| Model Number: | HACC102S100V500 |
| MOQ: | 10 Pieces |
| Payment Terms: | T/T,L/C,D/A,D/P |
Short answer: the HACC102S100V500 is a single layer MOS capacitor with 1000 pF ±10% capacitance and a 100V DC rating, built on float-zone silicon with a 300 nm thermally grown SiO2 dielectric in a 0.50 x 0.50 x 0.15 mm chip. It is specified for wide-temperature, low-outgassing assemblies that are die attached and wire bonded. Capacitance, voltage rating, chip geometry, dielectric type and metallization stack are all customizable.
| Parameter | Value |
| Capacitance | 1000 pF ±10% (±5% available) |
| Rated DC voltage | 100V |
| Dielectric | Thermal SiO2, 300 nm |
| Chip size | 0.50 x 0.50 x 0.15 mm |
| Q factor | >2000 at 1 MHz, >200 at 1 GHz |
| ESR at 1 GHz | <0.1 Ω |
| Intrinsic ESL | <0.05 nH |
| TCC | 0 ±30 ppm/°C |
| Leakage | <10 nA at 25°C, <100 nA at 125°C |
| Outgassing | TML <0.60%, CVCM <0.05% per ASTM E595 |
| Top electrode | TaN/TiW/Ni/Au, ≥2.5 µm Au, wire bondable |
| Operating temperature | -65°C to +200°C extended-range build |
| MSL | MSL 1 per J-STD-020 |
Thermal SiO2 is paraelectric, so the capacitance stays where the designer put it. Temperature coefficient is 0 ±30 ppm/°C across the -55°C to +125°C range, DC bias coefficient is below 10 ppm/V from 0V to the full 100V rating, and there is no ferroelectric aging, so long service life does not mean silent value drift. The extended-range build is tested from -65°C to +200°C with a qualification report per lot on request, and 1000 thermal cycles between -65°C and +150°C produce no electrode delamination. Typical use is avionics, satellite bus power distribution, radar front-ends, high-temperature industrial controls and down-hole instrumentation.
Because the dielectric is thermally grown in a wafer fab instead of being deposited from a ceramic slurry, the finished chip contains no binder, sintering aid or residual organic vehicle. Total mass loss is under 0.60% and collected volatile condensable materials under 0.05% per ASTM E595, well inside the screening limits applied to vacuum-exposed hardware. That matters anywhere a condensed film would fog an optical surface or contaminate a detector: vacuum instrument chambers, electron and ion beam columns, mass spectrometer optics, sealed sensor packages and satellite payload assemblies. Wafer lot traceability and, on request, residual gas analysis data ship with each lot.
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