Ultra-Compact 100 pF Single Layer MOS Capacitor Chip 0.25 mm Footprint 50V for High-Density System Integration

HACC101S50V250 Ultra-Compact 100 pF 50V Single Layer MOS Capacitor Chip

Short answer: the HACC101S50V250 is a single layer MOS capacitor with 100 pF ±10% capacitance and a 50V DC rating, built on float-zone silicon with a 300 nm thermally grown SiO₂ dielectric in a 0.25 x 0.25 x 0.10 mm chip. It is placed by die attach and connected by wire bonding, and it is used where board or substrate area is the limiting design constraint. Capacitance, voltage rating, chip geometry, dielectric type and metallization stack are all customizable.

Specifications at a Glance

Semiconductor-Grade Purity and Low Outgassing for Ultra-Clean Applications

The dielectric is grown in a wafer fab on float-zone silicon instead of being deposited from a ceramic slurry, so the finished chip carries no binder, sintering aid or residual organic vehicle. Total mass loss is under 1.0% and collected volatile condensable materials under 0.10%, inside the ASTM E595 screening limits applied to vacuum-exposed hardware. That matters where a condensed film would fog an optical surface or contaminate a detector, for example vacuum instrument chambers, electron and ion beam columns, mass spectrometer optics and sealed sensor packages. Wafer lot traceability documentation is supplied with each shipment.

Superior Wire-Bonding Compatibility for High-Yield Assembly

The top electrode is a sputtered TiW-Pt-Au stack with at least 2.5 µm of gold. The ductile gold spreads 40-100 mW of ultrasonic energy across the pad instead of driving it into the dielectric, which is the usual cause of cratering and bond-through on thin-film parts. Typical pull strength is above 6 gf for 25 µm gold wire. The process window covers 18-25 µm Au thermosonic ball bonding at 120-150°C stage temperature and 25 µm Al ultrasonic wedge bonding at room temperature, and the Pt barrier prevents gold leaching during eutectic reflow.

Typical Applications

• Phased-array transmit/receive module coupling and bypass
• GaN and GaAs power amplifier DC blocking and drain bias decoupling
• Satellite L-band to Ka-band payload matching networks
• Radar and V2X front-end modules (76-81 GHz)
• Vacuum instrumentation, ion optics and mass spectrometer front-ends
• Optical transceiver DC blocks (100G/400G QSFP-DD, OSFP)
• Medical RF subsystems such as MRI coil electronics