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Near-Zero Thermal Drift 1000 pF MOS Capacitor Wafer Probed KGD Single Layer Chip for High Temperature RF

Near-Zero Thermal Drift 1000 pF MOS Capacitor Wafer Probed KGD Single Layer Chip for High Temperature RF

Brand Name: Hoan
Model Number: HACC102S80V750KGD
MOQ: 10 Pieces
Payment Terms: T/T,L/C,D/A,D/P
Detail Information
Place of Origin:
Shaanxi, China
Certification:
ISO 9001:2015
Moisture Sensitivity:
MSL 1 (unlimited Floor Life Per J-STD-020)
Wafer-Level Test Coverage:
100% Capacitance, Leakage And Breakdown Probed On Wafer
Quality Grade:
KGD (Known Good Die), 100% Wafer Probed And Screened
Applications:
High-temperature RF, Power Amplifier Bias Networks, Telecom And Industrial Modules
Highlight:

1000 pF MOS Capacitor

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Near-Zero Thermal Drift MOS Capacitor

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High Temperature RF MOS Capacitor

Product Description

HACC102S80V750KGD - Near-Zero Thermal Drift 1000 pF MOS Capacitor, 80V, Wafer Probed KGD Single Layer Chip

In short: The HACC102S80V750KGD is a wire-bondable single layer MOS capacitor rated 1000 pF ±10% at 80V DC with a near-zero thermal drift COG/NPO dielectric. Every die is 100% wafer probed and shipped as Known Good Die (KGD) for high assembly yield in high temperature RF, telecom and industrial circuits.


Key Performance Advantages

1. Near-Zero Thermal Drift & High Temperature Coefficients

  • Class I COG/NPO dielectric with TCC of 0 ±30 ppm/°C across -55°C to +125°C, giving capacitance variation below ±0.3% over the full range
  • Near-zero DC bias coefficient (<10 ppm/V), preventing detuning of matching networks under bias
  • Zero aging, so capacitance stays stable over the whole product lifetime
  • Suited to VCO tanks, bias tees and precision filters operating at elevated temperatures

2. 100% Wafer Probed & KGD (Known Good Die) Quality

  • Every die is electrically probed at wafer level for capacitance, leakage and breakdown before dicing
  • Supplied as Known Good Die for maximum yield in hybrid, MCM and chip-on-board builds
  • Dielectric withstanding voltage >200V (>2.5× rated), 100% production tested
  • Ultra-low leakage: <10 nA @ 25°C and <100 nA @ 125°C at full 80V DC bias
  • Wire-bondable TaN/TiW/Ni/Au top metallization (≥2.5 µm Au) and TiW-Pt-Au backside for universal die attach
  • Lot traceability and S-parameter data provided per production lot


Typical Specifications

Parameter Value Test Condition
Nominal capacitance 1000 pF ±10% 1 MHz, 1.0 Vrms, 25°C
Rated DC voltage 80V Continuous, -55°C to +125°C
Dielectric withstanding voltage >200V (>2.5× rated) 5 s dwell, 100% tested
TCC 0 ±30 ppm/°C COG/NPO, -55°C to +125°C
Leakage current <10 nA @ 25°C; <100 nA @ 125°C 80V DC
Q factor >2000 @ 1 MHz Typical
ESR @ 1 GHz <0.1 Ohm De-embedded
Intrinsic chip ESL <0.05 nH S-parameter de-embedded
Chip dimensions 0.75 × 0.75 × 0.20 mm ±25 µm
Operating temperature -55°C to +125°C Full parametric
Quality 100% wafer probed, KGD Wafer-level screening


Applications

  • High temperature RF and microwave circuits
  • Power amplifier bias network decoupling
  • Precision filters and VCO tank circuits
  • Telecom, industrial and instrumentation modules


Near-Zero Thermal Drift 1000 pF MOS Capacitor Wafer Probed KGD Single Layer Chip for High Temperature RF