Custom Thin-Film Trim Value MOS Capacitors 30V 220pF Single Layer Chip Ultra-Linear C-V for Precision RF

Custom Thin-Film Trim Value MOS Capacitor HACC221S30V500 — 220pF 30V Ultra-Linear C-V Single Layer Chip

Entity summary. The HACC221S30V500 is a 220pF ±10% single-layer MOS capacitor in the Hoan HACC series, rated at 30V DC. It is built on a float-zone silicon substrate with a thermally grown oxide dielectric and a customizable thin-film metallization stack, in a 0.50mm × 0.50mm × 0.15mm chip. It is intended for precision RF applications where a predictable, linear capacitance-versus-voltage response and customer-specified metallization or trimmed capacitance values are required.

Key Features

• 220pF ±10% (±5% laser-trimmed option) at 30V DC in a 0.50 × 0.50 × 0.15mm chip
• Custom thin-film top metallization, Au from 1.0µm to 4.0µm, to match the bond recipe
• Ultra-linear C-V: voltage coefficient below 10ppm/V from 0V to 30V
• Paraelectric oxide dielectric — no aging drift and no ferroelectric hysteresis
• Intrinsic chip ESL below 0.05nH; TiW-Pt-Au backside for Ag-epoxy and AuSn die attach
• Operating temperature -55°C to +125°C; RoHS compliant (EU 2015/863)

Custom Thin-Film and Trim Value Options

The metallization system and the final capacitance value can both be set at the wafer level to fit the customer process.

• Custom thin-film metallization: the TiW adhesion/barrier base and gold bonding finish can be specified by thickness, with Au from 1.0µm to 4.0µm for wire or ribbon bonding. An optional Pt barrier on the backside supports silver-epoxy and AuSn die attach.
• Trim value options: capacitance can be laser-trimmed during wafer processing to tighten distribution; ±5% (J) tolerance is available alongside the standard ±10% (K), and non-standard values within a 10pF-1000pF window can be ordered on the same 0.50mm platform.
• Custom geometry: square standard, plus rectangular aspect ratios up to 4:1 and an optional bordered (margin) electrode for conductive-epoxy assembly.

Electrical Specifications (T = 25°C unless noted)

Typical Applications

• VCO tank circuits and PLL loop filters requiring stable, bias-independent capacitance
• Precision RF and microwave matching networks and DC blocks
• LNA input matching and low-loss bypass where tuning stability matters
• Sample-and-hold and integrator stages benefiting from low dielectric absorption
• Multi-value chip sets in a uniform footprint for automated hybrid assembly