Ultra-Low ESL 680 pF 50V MOS Capacitors Soft-Breakdown Tolerant Single Layer Chip for Circuit Protection

What this product is

A single layer MOS capacitor is a planar metal-insulator-semiconductor capacitor built on a float-zone silicon substrate with a thermally grown SiO₂ dielectric. Because the current path is a single vertical barrier with no internal electrodes and no vias, the device presents very low equivalent series inductance and a very small spread in capacitance over temperature and bias. This model is the larger-footprint variant, intended for protection and high-current decoupling roles.

• Product type: single layer MOS capacitor / wire-bondable chip capacitor
• Model: HACC681S50V750  |  Brand: Hoan
• Capacitance: 680 pF ±10%  |  Rated voltage: 50 V DC
• Chip size: 0.75 × 0.75 × 0.20 mm  |  Dielectric: COG/NPO (Class I)
• Mounting: wire bonding, or conductive epoxy / AuSn / sintered silver die attach

Low parasitic inductance and transient response

The ability of a capacitor to hold a rail steady during a fast transient is set by the impedance it presents in the first few nanoseconds, and at those timescales impedance is dominated by ESL rather than by capacitance. The single layer construction collapses the current loop to a 0.20 mm vertical path, which is where the transient advantage comes from.

• Intrinsic ESL below 0.05 nH, approximately an order of magnitude lower than a comparable multilayer ceramic chip
• ESR below 0.05 Ω at 1 GHz, so the clamp behaves resistively rather than inductively at the edge of the transient
• Self-resonant frequency above 1.5 GHz chip level, keeping the part capacitive across the band of interest
• No DC bias derating and no piezoelectric ringing, because the dielectric is paraelectric
• Multiple parallel bonds on the 0.75 mm pad support pulse currents above 1 A rms

In a hot-plug inrush path or a bias network feeding a wide-bandgap power stage, the practical result is a lower clamp overshoot and a shorter settling tail than a same-value multilayer part, without stacking capacitors in series to survive the voltage excursion.

Customization options

This model is a configurable platform rather than a fixed catalogue item, so the part can be re-specified for a particular rail, waveform or footprint. The same platform can also be re-assigned to another product family in your catalogue structure when your purchasing or catalogue classification requires it.

Typical applications

• Hot-plug and inrush limiting networks in telecom and datacom line cards
• Load-dump and surge clamping on 12–48 V rails
• Bias decoupling for wide-bandgap power stages on 28–50 V supplies
• Input and output filtering in switching converters with high dV/dt
• Transient suppression in industrial power, metering and instrumentation boards
• Broadband RF bypassing and DC blocking in compact modules