Self-Aligned Sub-Micron Metal Electrode MOS Capacitor HACC106S30V330 330pF 30V Dispersion Free Chip

Self-Aligned Sub-Micron Top Metal MOS Capacitor HACC106S30V330 330pF 30V

Summary: The HACC106S30V330 is a 330 pF ±10%, 30 V DC single-layer MOS capacitor with a self-aligned sub-micron top metal electrode and a dispersion-free RF response. It is intended for compact millimetre-wave circuits that need a fine electrode geometry and a stable capacitance value.

Overview

The HACC106S30V330 is built on a float-zone silicon substrate (above 1000 Ω·cm) with a 300 nm thermal SiO₂ dielectric. The top electrode is defined by a self-aligned lift-off process that produces a sub-micron metal geometry, which allows a smaller pad pitch and a lower parasitic capacitance per connection. The chip measures 0.40 × 0.40 × 0.15 mm with 2.5 µm minimum gold top metallization. The part is a die-level single-layer MOS capacitor (a wire bondable capacitor) for hybrid and chip-and-wire assemblies, also referred to as a single-layer capacitor (SLC) chip.

Key Features

• Self-aligned sub-micron top metal for fine pad pitch and low parasitic capacitance.
• Dispersion-free response with capacitance within ±1% from 100 Hz to 40 GHz.
• Compact 0.40 × 0.40 × 0.15 mm die.
• 330 pF ±10% (5% available) at 30 V DC with no DC bias derating.
• Intrinsic ESL below 0.05 nH; Q > 2000 at 1 MHz.
• ISO 9001:2015 and RoHS compliant, wire bondable gold metallization.
• Custom capacitance values available on the same die platform.

Electrical Specifications (T = 25°C unless noted)

Typical Applications

• Millimetre-wave front-end modules with fine pad pitch
• Broadband DC blocking and impedance matching
• Compact RF filters and couplers
• Phased-array beamformer elements
• High-density hybrid microcircuits