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Gradient Impedance Matching MOS Capacitor 220 pF 30V Chip for Ultra-Wideband RF Signal Chains

Gradient Impedance Matching MOS Capacitor 220 pF 30V Chip for Ultra-Wideband RF Signal Chains

Brand Name: Hoan
Model Number: HGM221S30V220
MOQ: 10 Pieces
Payment Terms: L/C,D/A,D/P,T/T
Detail Information
Place of Origin:
Shaanxi, China
Certification:
ISO 9001:2015, RoHS
Chip Size:
0.50 X 0.50 X 0.15 Mm
Operating Temperature:
-55°C To +125°C
Moisture Sensitivity Level:
MSL 1 (J-STD-020)
RoHS:
Compliant (EU 2015/863)
Usable Bandwidth:
DC To 40 GHz (typical)
Customization:
Custom Capacitance 10 PF-1000 PF, Gradient Interface Profile And Die Geometry
Highlight:

Gradient impedance matching MOS capacitor

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220 pF 30V MOS capacitor

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Ultra-wideband RF signal MOS capacitor

Product Description

HGM221S30V220 Gradient Impedance Matching MOS Capacitor — 220 pF 30V Ultra-Wideband


In short: The HGM221S30V220 is a 220 pF, 30 V single-layer MOS capacitor built on high-resistivity float-zone silicon with a thermally grown SiO2 dielectric. Its gradient impedance interface smooths the transition to the surrounding circuit so the capacitor keeps a consistent response over an ultra-wideband range, and it also holds sub-degree phase consistency between elements for array use. Custom capacitance values and interface profiles are available.


Key Facts


Item Value
Brand Hoan
Model HGM221S30V220
Category MOS Capacitors
Capacitance 220 pF ±5% (±2% on request)
Rated DC Voltage 30 V
Dielectric Thermal SiO2, paraelectric (300 nm)
Interface Gradient impedance matching layer (wafer-defined)
Phase Consistency Sub-degree, element-to-element
Usable Bandwidth DC to 40 GHz (typical)
Termination Wire bond or flip-chip micro-bump
Chip Size 0.50 x 0.50 x 0.15 mm
Operating Temperature -55 °C to +125 °C
Place of Origin Shaanxi, China
Certification ISO 9001:2015, RoHS
MOQ 10 pieces
Lead Time 5-7 working days for stock, 3-4 weeks for production


Gradient Impedance Matching Layer Construction


The matching layer is fabricated as part of the wafer process, between the dielectric interface and the electrode, using a graded sequence of layers. Because it is defined lithographically, the profile can be adjusted per design to place the transition where the surrounding circuit needs it. This keeps the matching integrated into the component rather than requiring external matching elements.

  • Lithographically defined graded layer
  • Profile tunable per design
  • No external matching elements required


Sub-Degree Phase Consistency for Beamforming

In addition to its broadband interface, the part holds sub-degree phase consistency between elements, so it can be used in array channels without per-element phase trimming. Capacitance tolerance is ±5% standard (±2% on request), the C-V characteristic is linear from 0 V to 30 V, and the amorphous SiO2 dielectric does not age, so the phase term stays stable over temperature and time.

  • Element-to-element phase consistency in a sub-degree window
  • Linear C-V from 0 V to 30 V: stable phase vs bias
  • Non-ferroelectric SiO2: stable phase vs temperature and time


Applications

  • Ultra-wideband RF coupling and DC blocking
  • Phased-array and beamforming channels requiring matched phase
  • Broadband bypass and supply decoupling
  • 5G and 6G front-end modules
  • Satellite communication receive and transmit chains
  • Test and measurement instrumentation needing low reflection over a wide band


Gradient Impedance Matching MOS Capacitor 220 pF 30V Chip for Ultra-Wideband RF Signal Chains