Sub-1% Capacitance Matched MOS Capacitor 220pF 100V CTE Optimized Single Layer Chip For GaN SiC Power Modules

HACC221S100V502 Precision MOS Capacitor — 220 pF 100 V with Sub-1% Capacitance Matching and CTE Optimization for GaN & SiC Power Substrates

The HACC221S100V502 is a 220 pF ±10% single-layer MOS (metal-oxide-semiconductor) capacitor rated at 100 V DC, fabricated on float-zone silicon (>1000 Ω·cm) with 300 nm-class thermal SiO₂ dielectric and TiW-Au / TiW-Pt-Au metallization. Standard chip outline is 0.55 mm × 0.55 mm × 0.18 mm (±25 µm). It is engineered for wide-bandgap power modules where pair-to-pair capacitance symmetry and thermo-mechanical reliability under power cycling determine circuit performance.

Because the silicon MOS structure is formed directly on a single-crystal silicon substrate, its coefficient of thermal expansion (CTE, 2.6 ppm/°C) is inherently close to that of silicon-carbide and GaN-on-SiC power devices — an advantage over alumina-based ceramic capacitors when co-packaged on power substrates.

Sub-1% Precision Capacitance Matching across Wafers

• Wafer-level sorting service: capacitors are 100% electrically probed and sorted so that matched sets shipped together stay within <1% capacitance spread, across wafer position, wafer-to-wafer and lot-to-lot;
• Matched pairs and arrays are shipped with digital wafer map documentation and full lot traceability per wafer lot;
• Ultra-stable thermal SiO₂ dielectric keeps matching drift small over the full -55°C to +200°C range and under DC bias (TCC +35 ppm/°C);
• Ideal for balanced half-bridge gate drive, snubber and divider networks where capacitance symmetry controls switching balance and EMI.

Electrical Characteristics (typical, 25°C unless noted)

Typical Applications

Gate drive and snubber decoupling in GaN and SiC power modules; hybrid power modules and traction inverters; on-board chargers and high-density DC-DC converters; RF power amplifier bias networks; and any co-packaged power assembly where CTE match, matched capacitance and low inductance are required.