| Brand Name: | Hoan |
| Model Number: | HACC221S50V350 |
| MOQ: | 10 Pieces |
| Payment Terms: | T/T,L/C,D/P,D/A |
In short: the Hoan HACC221S50V350 is a 220 pF ±10%, 50 V DC single layer MOS capacitor supplied as a wire bondable die measuring 0.50 × 0.50 × 0.09 mm. Its top and bottom electrode stacks are identical, so the part operates in either direction with no polarity marking. Q factor is above 2000 at 1 MHz and remains above 25 at 10 GHz, ESL is below 0.04 nH and the total profile is under 100 µm, which allows the die to be laminated inside laminate, polyimide and LTCC substrate build-ups. Capacitance value, voltage rating, die geometry and metallization are customizable.
The HACC221S50V350 belongs to the single layer MOS capacitor family, also described in the industry as an SLC (single layer capacitor), a wire bondable chip capacitor or a MOS RF chip capacitor. The device is a planar metal-oxide-semiconductor structure: a 300 nm thermally grown SiO2 dielectric sits between a sputtered thin-film top electrode and the metallized backside of a high-resistivity float-zone silicon substrate (>1000 Ohm·cm). Current flows vertically through a path of about 90 µm, with no internal electrode stack, no vias and no serpentine routing. This vertical, single-layer current path is the reason the part keeps a high Q and a low equivalent series inductance at microwave frequencies, where multi-layer ceramic chip capacitors reach self-resonance and turn inductive.
| Parameter | Standard value | Custom range |
| Capacitance | 220 pF ±10% | 10 pF to 1000 pF, ±5% or tighter on request |
| Rated voltage | 50 V DC | 6.3 V to 100 V DC single layer |
| Dielectric | 300 nm thermal SiO2, Class I | Class II high-K or custom oxide thickness |
| Die size | 0.50 × 0.50 mm | 0.25 × 0.25 mm to 5.0 × 5.0 mm, rectangular up to 4:1 |
| Die thickness | 90 µm | 50 µm to 250 µm |
| Top metallization | TaN/TiW/Ni/Au, 2.5 µm Au | Up to 5.0 µm Au, Al or TiW-Au options |
| Backside metallization | TiW-Pt-Au, 1.0 µm Au | Au only, AuSn preform 3-5 µm, AuGe, sintered silver |
| Tolerance and matching | ±10% | Matched sets below ±1% across wafer |
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