| Brand Name: | Hoan |
| Model Number: | HACC221S50V300 |
| MOQ: | 10 Pieces |
| Payment Terms: | T/T,L/C,D/A,D/P |
Product overview: The HACC221S50V300 is a single-layer metal-oxide-semiconductor (MOS) capacitor with a nominal capacitance of 220pF ±10% and a 50V DC working voltage. It is built on a high-conductivity float-zone silicon substrate with a 300nm thermal silicon dioxide (SiO2) dielectric and a TiW-Au metallization stack. Its defining characteristic is phonon scattering control — the dielectric, substrate, and metal interfaces are engineered so that heat generated by RF loss is conducted away efficiently instead of building up in a hot spot. This suits high-power RF stages where thermal stability limits performance.
In a solid, heat is carried by phonons, which are quantized lattice vibrations. Any feature that interrupts a phonon's travel — grain boundaries, crystal defects, and rough or chemically mixed interfaces — scatters it and lowers thermal conductivity, so heat stays where it was generated. Phonon scattering control means engineering the dielectric, substrate, and metallization interfaces to keep phonon transport efficient: single-crystal float-zone silicon has a long phonon mean path (the average distance a phonon travels before it is scattered), the dielectric is a dense thermal oxide with minimal defect density, and the thick gold metallization provides a low-resistance thermal path to the mounting surface.
| Parameter | Value | Condition |
| Capacitance | 220pF ±10% | 1MHz, 1.0Vrms |
| Rated DC voltage | 50V | Continuous |
| Dielectric strength | >125V DC | 1 minute, 25°C |
| ESR at 1GHz | <0.08 Ω | Typical |
| Q factor at 1MHz | >2000 | Typical |
| Intrinsic chip ESL | <0.05nH | De-embedded from S-parameters |
| Substrate | Float-zone Si, >1000 Ω·cm | Single crystal, high thermal conductivity |
| Dielectric | Thermal SiO2, 300nm | Low defect density |
| TCC | +35ppm/°C | -55°C to +125°C |
| Leakage current | <10nA | 50V DC, 25°C |
| Chip dimensions | 0.50 × 0.50 × 0.15mm | ±0.025mm |
| Top metallization | TiW + Au, 2.5µm min | Wire bondable, thermally conductive |
| Backside metallization | TiW-Pt-Au, Au 1.0µm min | Full-area thermal path |
| Operating temperature | -55°C to +125°C | — |
| RoHS | Compliant | EU 2015/863 |
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