Laser Trimmed 220 pF MOS Capacitor Wafer-Level Matched Single Layer Chip for TOSA ROSA Optical Transceivers

HACC221S20V500 - Laser Trimmed 220 pF MOS Capacitor, 20V, Wafer-Level Matched Single Layer Chip

In short: The HACC221S20V500 is a wire-bondable single layer MOS (metal-oxide-semiconductor) capacitor rated 220 pF ±10% at 20V DC. Each die is laser trimmed and wafer-level matched to better than ±0.1%, making it a practical choice for TOSA and ROSA optical transceiver DC blocks, bias tees and impedance matching networks.

Key Performance Advantages

1. Laser Trimmed & Wafer-Level Precision Matching

• Every capacitor is individually laser trimmed to a target value, achieving pair matching within ±0.1% for differential driver and TIA front-ends
• Wafer-level measurement and binning keep capacitance consistent across the whole lot, reducing the mismatch that degrades optical eye diagrams
• Tight absolute tolerance available down to ±2% (standard ±10%) for matched pairs and filters
• Repeatable unit-to-unit RF behaviour reduces calibration and rework in volume transceiver assembly

2. Optimized for Optical Transceivers / TOSA & ROSA

• Ultra-low intrinsic ESL (<0.05 nH) with chip-level SRF >2 GHz supports clean DC blocking and matching at 25 Gb/s to 800 Gb/s PAM4 rates
• High Q factor (>200 @ 1 GHz) minimizes insertion loss in bias-tee and matching networks
• Compact 0.50 × 0.50 × 0.15 mm footprint fits dense TOSA/ROSA layouts
• Wire-bondable top contact (TaN/TiW/Ni/Au, ≥2.5 µm Au) for gold ribbon and 25 µm Au thermosonic bonding
• Double-Sided Bordered architecture provides epoxy containment and an optical alignment reference during die attach

Customization Options

Applications

• 100G/400G/800G QSFP-DD and OSFP optical transceiver DC blocks and bypass
• TOSA/ROSA driver and TIA inter-stage coupling
• Coherent optics and silicon photonics RF matching
• 5G NR FR1/FR2 power amplifier impedance matching
• RF test and measurement front-ends