Dipole Fatigue Resistant MOS Capacitor 220 pF 30V Flip-Chip Ready Chip for Wafer-Level BGA Assembly

HFC221S30V220 Dipole Fatigue Resistant MOS Capacitor — 220 pF 30V Flip-Chip Ready

In short: The HFC221S30V220 is a 220 pF, 30 V single-layer MOS capacitor built on high-resistivity float-zone silicon with a thermally grown SiO2 dielectric. It is designed for circuits that must hold a stable capacitance over many field and thermal cycles, and it is supplied with wafer-level micro-bump termination for flip-chip, bondwire-free assembly. Custom capacitance values and bump layouts are available.

Key Facts

Flip-Chip Ready for Bondwire-Free Assembly

The chip is terminated with a symmetric wafer-level micro-bump so it can be placed directly onto laminate, ceramic or silicon interposers by a standard flip-chip bonder. This removes gold wire bonds, which are the principal source of series inductance and of mechanical heel fatigue in high-cycle assemblies.

• Direct flip-chip attach, no gold wire bonds
• Intrinsic chip ESL <0.05 nH; series resonance >5 GHz
• Stable bump contact resistance over repeated thermal cycling

Wafer-Level BGA / Micro-Bump Ready

Every device is produced with wafer-level UBM and 100% wafer probe, so it drops straight into wafer-level packaging and BGA reflow flows without additional back-end processing.

• Copper-pillar micro-bump with SnAg solder cap, 80 µm pitch (custom pitch available)
• MSL 1 floor life; reflow up to 260 °C peak
• 100% wafer-level electrical test with digital wafer map

Applications

• High-cycle RF switching and pulsed RF circuits
• Resonator and tank circuits requiring long-term stability
• Flip-chip decoupling for RF power amplifiers
• Multi-chip modules where bondwire-free assembly is required
• Industrial and infrastructure equipment with long service life
• Systems exposed to repeated thermal cycling