| Brand Name: | Hoan |
| Model Number: | HACC105S30V150 |
| MOQ: | 10 Pieces |
| Payment Terms: | L/C,D/A,D/P,T/T |
Summary: The HACC105S30V150 is a 150 pF ±10%, 30 V DC single-layer MOS (metal-oxide-semiconductor) capacitor with damped frequency dispersion and a flat dielectric response from DC to the Ka band. It is intended for ultra-wideband RF signal chains that require a capacitance value that does not shift with frequency.
The HACC105S30V150 uses a single-layer MOS structure on a float-zone silicon substrate (above 1000 Ω·cm) with a 300 nm thermal SiO2 dielectric. The chip measures 0.50 × 0.50 × 0.15 mm with 2.5 µm minimum gold top metallization and 1.0 µm minimum backside gold. It is wire bondable and compatible with eutectic die attach. The part is a die-level single-layer MOS capacitor (a wire bondable capacitor) for hybrid and chip-and-wire assemblies, also referred to as a single-layer capacitor (SLC) chip.
| Parameter | Value | Test Condition |
|---|---|---|
| Capacitance | 150 pF ±10% | 1 MHz, 1.0 Vrms |
| Capacitance Tolerance Options | ±10% (K), ±5% (J) | — |
| Capacitance Dispersion | Within ±1% | 100 Hz to 40 GHz, 25°C |
| Rated DC Voltage | 30 V | Continuous operation |
| Dielectric Strength | Above 100 V DC | 1 minute, 25°C |
| Intrinsic Chip ESL | Below 0.05 nH | De-embedded from S-parameters |
| Self-Resonant Frequency | Above 1.5 GHz | Typical, 0.5 mm bond wire |
| Q Factor at 1 MHz | >2000 | Typical |
| Leakage Current | Below 10 nA | 30 V DC, 25°C |
| Dielectric | Thermal SiO2, 300 nm | Dry oxidation |
| Substrate | Float-zone Si, above 1000 Ω·cm | High-resistivity |
| Chip Dimensions | 0.50 × 0.50 × 0.15 mm | ±0.025 mm |
| Operating Temperature | -55°C to +125°C | — |
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